Many portable products, such as cell phones, laptop computers, tablet personal computers (PCs), personal data assistants (PDAs) or the like, incorporate a processing system having one or more processors executing programs that support communication and multimedia applications. The processing system for such products may also include complex memory systems for storing instructions and data, controllers, and peripheral devices configured to interface with the processors and memory over one or more busses.
In such a processing system, various conditions and circumstances can lead to the one or more processors receiving an unexpected reset, such that the processor ceases to execute a previously active software program, reinitializes a number of internal resources, and begins execution from an architecture defined instruction address. For example, a processor may have facilities for a software initiated reset, one or more hardware timeout circuits that may issue a reset due to detection of inactivity of busses or other monitored signaling, external circuits such as a voltage monitor reacting to a short lived brownout, and peripherals and debug circuits may also initiate a processor reset. During a processor reset, processor state information is initialized to a defined deterministic state. As a consequence of a reset, the processor state information just prior to the reset is lost. Thus, finding the cause of the reset, such as an unexpected reset, may not be easily determined.